Dr.Sreeja Mole S S Faculty Publications

Security For Organising GSM Digital Notice Board, ISSN 2393-8374, 2018

Vehicle Theft Detection by GSM, ISSN 2393-8374,2018

Cyber forensics case study on Shamoon Virus Attack, ISSN 2321-676X,2018

B.Santhosh Kumar Faculty Publications

“Implementation of Standard Mean Filtered Bit-Plane Image Segmentation Using Modified Level Sets”) in International conference on Photonics, VLSI and Signal Processing (ICPVS 2014 organized by Kakatiya University,2014

“Content Based Image Retrieval Using GLCM & CCM” in International Conference on Information Engineering, Management and Security (ICIEMS 2014).

"IR Based Color Image Preprocessing Using PCA with SVD Equalization", in International system design and applications, 27-29 Nov. 2012,651 - 655, ISSN: 2164-7143 ,2012

T.Saibaba Faculty Publications

Implementation of Low Power Area Efficient ALU with Low Power Full Adder Using Microwind DSCH3, ISSN 2393-8374,2018

Simulation for Vedic Multipliers for High Speed Low Power Operations with HDL, ISSN 2393-8374,2018

Low-Power Novel CMOS Pulse Triggered and Master Slave Flip Flops, ISSN 0975-5662,2016

Design of FIR Filter Using CSD and FCSD Methods and HDL code Generation, ISSN 0975-5662,2016

Design of Low Power Domino Logic Circuits, ISSN 2320-8007,2016

Design of Low Power CMOS 4 BIT Vedic Multiplier, ISSN 0975-5662,2016

Design of High Speed Low Power 1 Bit CMOS Full Adder Using FPGA Kit and Microwind 3, ISSN 0975-5662,2015

Low Power BZ-FAD Multiplier by using Shift and Add Architecture, ISSN 2319-8354,2014

B.Arunalatha Faculty Publications

Wireless Home Appliance Control Using IoT, ISSN 2456-5083,2017

Raspberry Pi and IoT Based Industrial Automation, ISSN 2456-5083,2017

A Review on Industrial Automation Using IOT, ISSN 2456-5083,2017

Implementation of Standard Mean Filter Using Bit Plane for Noise Removal for Images, ISSN 2348-4845,2017

Remote Monitoring for VIPs Using GPRS, ISSN 2393-8161,2015

D.V Rejeshwar Raju Faculty Publications

Ultra Low Power VLSI Design, ISSN 2393-8374,2018

D.Rita Faria Faculty Publications

Simulation for Vedic Multipliers for High Speed Low Power Operations with HDL, ISSN 2393-8374,2018

Implementation of Low Power Area Efficient ALU with Low Power Full Adder Using Microwind DSCH3, ISSN 2393-8374,2018

Design of FIR Filter Using CSD and FCSD Methods and HDL code Generation, ISSN 0975-5662,2016

Design of Low Power Domino Logic Circuits, ISSN 2320-8007,2016

Design of High Speed Low Power 1 Bit CMOS Full Adder Using FPGA Kit and Microwind 3, ISSN 0975-5662,2015

Low Power BZ-FAD Multiplier by using Shift and Add Architecture, ISSN 2319-8354,2014

A.Vinay Kumar Reddy Faculty Publications

Leakage Current Control Using Full Adder, ISSN 2349-6002,2016

High Speed Low Power Performance of 8 Bit Parallel Multiplier Accumulator using Modified Radix-8 Booth Algorithm, ISSN 2349-6002,2016

Minhaz Sultana Faculty Publications

64 BIT MAC Unit Design using Multiplier & Ripple Carry Adder Using Vedic Multiplier, ISSN 2348-6848,2017

Area Delay Efficient FM0/ Manchester Encoding using SOLS Technique Using Wireless Sensor Network for Communication Applications, ISSN 2348-6848,2017

A.Rajitha Reddy Faculty Publications

Implementation of Recursive Digital Sinusoidal Signal Generator, ISSN 2393-8374,2018

Implementation of Auto Correlation Function and Weiner Khinchin Relation A Novel Approach, ISSN 2393-8374,2018

L.Narasimhulu Faculty Publications

Implementation of Auto Correlation Function and Weiner Khinchin Relation A Novel Approach, ISSN 2393-8374,2018

Implementation of Recursive Digital Sinusoidal Signal Generator, ISSN 2393-8374,2018

Bit Error Rate of Twisted Pair Cable for Different Noise Environment a Novel Approach, ISSN 2348-9480,2016

K.Harikrishna Faculty Publications

VHDDL Implementation of USB Transceiver Macrocell Interface with USB 2.0 Specifications, ISSN 2454-356X,2016

Design of Low Power 4 BIT cmo Baugh Wooley Multiplier in DSM Technology, ISSN 0975-5662,2015

S. Samyuktha Faculty Publications

Deign of Wireless Sensor Network Using Chain Based Data Aggregation Techniques, ISSN 2348-6848,2018

R.RAMESH Faculty Publications

VHDDL Implementation of USB Transceiver Macrocell Interface with USB 2.0 Specifications, ISSN 2454-356X,2016

P.Tirupathi Faculty Publications

High Performance of CMOS 1-Bit Full Adder cell Based on Novel Approach, ISSN 2348-6848,2017

Implementation of Low Power Baugh-Woody Multiplier ad Modified Baugh Woody Multiplier Using Cadence RTL in DSM Technology, ISSN 2348-6848,2017

Design of CMOS 1-BIT Full Adder, 2349-6002,2016

Design of Low Power 4 BIT cmo Baugh Wooley Multiplier in DSM Technology, ISSN 0975-5662,2015

High Performance of 1 Bit Full Adder Cell Based on Novel Techniques, ISSN 2320-8007,2015

D.Sravani Faculty Publications

Implementation of Low Power Baugh-Woody Multiplier ad Modified Baugh Woody Multiplier Using Cadence RTL in DSM Technology, ISSN 2348-6848,2017

High Performance of CMOS 1-Bit Full Adder cell Based on Novel Approach, ISSN 2348-6848,2017

Design of CMOS 1-BIT Full Adder, ISSN 2349-6002,2016

S.Swathi Faculty Publications

1. 64 BIT MAC Unit Design using Multiplier & Ripple Carry Adder Using Vedic Multiplier, , ISSN 2348-6848,2017

Area Delay Efficient FM0/ Manchester Encoding using SOLS Technique Using Wireless Sensor Network for Communication Applications, ISSN 2348-6848,2017

D.Gurunath Faculty Publications

Vehicle Theft Detection by GSM, ISSN 2393-8374,2018

Security For Organising GSM Digital Notice Board, ISSN 2393-8374,2018

B.Parameshwari Faculty Publications

Multiphase Cooperation Architecture using Biparite Graph, ISSN 2393-8374,2018

M.Srujana Faculty Publications

VLSI Implementation of AES Algorithm using Rijndael Algorithm, ISSN 2393-8374,2018